Impulse Releases CoDeveloper 3.7, Increases Streaming FPGA I/O Throughput up to 16X

First launched in 2004, the CoDeveloper compiler has undergone many updates in response to user requests. According to Impulse, the version 3.7 update focuses on the core quality of compilation, and in particular on features that assist with pipeline optimization and streaming I/O performance.

 

“A key metric of software-to-hardware compilers is quality of results (QOR) relative to design effort,” said David Buechner, Impulse VP of Business Development. “Our users have told us that they value the control over optimizations they are given using Impulse C, including the ability to directly influence size and speed tradeoffs and to introduce hand-crafted HDL functions when needed. This CoDeveloper update demonstrates our unwavering commitment to our users.”

 

For FPGA designers, quality of results is often characterized as how small and efficient a given block of code will compile down to bitmaps running on the FPGA, and the clock speeds achievable in the resulting hardware. However, for many higher-level applications the ability to control the hardware generation process during algorithm refactoring can result in even greater gains in performance, especially for C algorithms that are being re-implemented using streaming, pipelining, and multiple-process parallelism.

 

“C is making inroads into FPGA design,” said Brian Durwood, Impulse CEO. “Or rather, FPGAs are making inroads into processing domains that previously would have been found in microprocessors, DSPs or high performance servers. A key factor in this has been the availability of higher level, more software-like tools, and the ability for software/hardware groups to work together while speaking a common language – in this case C.”

 

Compiler improvements in CoDeveloper 3.7 are intended to make the move from software to hardware easier, with higher quality hardware generation and added programmer control. These improvements include timing optimizations that speed up generated pipelines by optimizing out unnecessary dependencies in address generation, and other optimizations that identify and improve state-enable dependencies for more efficient parallel statement scheduling. For selected platform targets, local FPGA memory can now be banked, allowing streaming reads and writes to access memories at a wider width than the actual array element width. To cite one example, an array of bytes can be generated with eight banks allowing stream reads and writes to process 64 bits per cycle, effectively increasing host I/O by 8X or even 16X.

 

For pipeline and parallel statement analysis, dataflow graphs are now created dynamically in the Stage Master Explorer tool for improved responsiveness, and panning and zooming features have been improved for exploring very large and wide pipeline structures. Also, functions can now be debugged by clicking on the function call to open new window displaying the function state.

 

At the request of CoDeveloper Linux users, the graphical Stage Master Explorer and Debugger tools are now supported in Linux. Platform Support Package improvements have also been made, including the ability to access shared memory interfaces with address spaces greater than 32 bits.

 

“We are proud to support an enthusiastic and diverse base of Impulse users and target 

platforms,” said Durwood. “It has been fascinating to see the range of FPGA projects continues to expand, with Impulse C now being used for machine vision, life sciences, automated trading and other high-throughput applications. We look forward to the next software-to-hardware challenges.”

 

The Version 3.7 update is available free of charge to licensed users of the CoDeveloper software who have active maintenance agreements.